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The Impact of Device Configuration on the Photon-Enhanced Negative Bias Thermal Instability of GaInZnO Thin Film Transistors

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ELECTROCHEMICAL AND SOLID STATE LETTERS
卷 13, 期 6, 页码 II213-II215

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ELECTROCHEMICAL SOC INC
DOI: 10.1149/1.3381023

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  1. Samsung Advanced Institute of Technology

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We investigated the effect of device configuration on the light-induced negative bias thermal instability of gallium indium zinc oxide transistors. The V-th of back-channel-etch (BCE)-type transistors shifted by -3.5 V, and the subthreshold gate swing (SS) increased from 0.88 to 1.38 V/decade after negative bias illumination temperature stress for 3 h. However, etch-stopper-type devices exhibited small V-th shifts of -0.8 V without degradation in the SS value. It is believed that the inferior instability of the BCE device is associated with the formation of an interfacial molybdenum (Mo) oxychloride layer, which occurs in the course of dry etching Mo using Cl-2/O-2 for source/drain patterning. (C) 2010 The Electrochemical Society. [DOI: 10.1149/1.3381023] All rights reserved.

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