期刊
CHEMISTRY OF MATERIALS
卷 26, 期 1, 页码 163-171出版社
AMER CHEMICAL SOC
DOI: 10.1021/cm402179h
关键词
graphene-based electronics; top-down; bottom-up; fabrication; graphene
资金
- AFOSR [FA9550-09-1-0581]
- ONR-MURI Graphene Program [00006766, N00014-09-1-1066]
- AFOSR-MURI Program [FA9550-12-1-0035]
- Sandia National Laboratory
- AZ Electronic Materials and Lockheed Martin through the LANCER Program
Graphene electronic devices can be made by top-down (TD) or bottom-up (BU) approaches. This Perspective defines and explains those two approaches and discusses the advantages and limitations of each, particularly in the context of graphene fabrication. It is further exemplified using graphene nanoribbons as the prototypical graphene structure that can be prepared using either a TD or BU approach. The TD approach is well-suited for placement of large arrays of devices on a chip using standard patterning tools. However, the TD approach severely compromises the edges of the graphene since present fabrication tools are coarse relative to the similar to 0.1 nm definition of a C-C bond. The BU approach can afford exquisite control of the graphene edges; however, placing the structures, en mass, in the locations of interest is often impossible. Also, using the BU approach, it can be very difficult to make device structures long enough for integration with TD-derived probe electrodes. Specific examples are shown, along with an outlook for optimization of future graphene devices in order to capitalize upon the advantages of both TD and BU fabrication methodologies.
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