期刊
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS
卷 10, 期 1, 页码 91-115出版社
ASSOC COMPUTING MACHINERY
DOI: 10.1145/1044111.1044117
关键词
design; algorithms; compression ratio; decompression; Huffman encoding; runlength encoding; scan-in test power; switching activities; test pattern compression; test compression; power reduction; scan applications
This article mixes two encoding techniques to reduce test data volume, test pattern delivery time, and power dissipation in scan test applications. This is achieved by using run-length encoding followed by Huffman encoding. This combination is especially effective when the percentage of don't cares in a test set is high, which is a common case in today's large systems-on-chips (SoCs). Our analysis and experimental results confirm that achieving up to an 89% compression ratio and a 93% scan-in power reduction is possible for scan-testable circuits such as ISCAS89 benchmarks.
作者
我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。
推荐
暂无数据