High-voltage normally off GaN MOSFETs on sapphire substrates

Gallium nitride self-aligned MOSFETs were fabricated using low-pressure chemical vapor-deposited silicon dioxide as the gate dielectric and polysilicon as the gate material. Silicon was implanted into an unintentionally doped GaN layer using the polysilicon gate to define the source and drain regions, with implant activation at 1100degreesC for 5 min in nitrogen. The GaN MOSFETs have a low gate leakage current of less than 50 pA for circular devices with W/L = 800/128 mum. Devices are normally off with a threshold voltage of +2.7 V and a field-effect mobility of 45 cm(2)/Vs at room temperature. The minimum on-resistance measured is 1.9 mOmega (.) cm(2) with a gate voltage of 34 V (W/L = 800/2 mum). High-voltage lateral devices had a breakdown voltage of 700 V with gate-drain spacing of 9 mum (80 V/mum), showing the feasibility of self-aligned GaN MOSFETs for high-voltage integrated circuits.