期刊
IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS
卷 4, 期 -, 页码 69-75出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JXCDC.2018.2878635
关键词
Antiferromagnet field-effect transistor (AFMFET); complementary logic; majority-gate logic; performance analysis
资金
- Semiconductor Research Corporation [2760.003]
In this paper, a compact and complementary logic implementation is proposed for antiferromagnet field-effect transistor (AFMFET) devices. The implementation enables a complete set of Boolean operations based on complementary logic as well as majority-gate logic. The impacts of several key device-level design parameters are investigated, such as the channel resistance and critical switching voltage, and their optimal values that minimize the overall energy-delay product (EDP) of a 32-bit arithmetic logic unit are quantified. In addition, it is shown that one can potentially take advantage of the large domain size of some AFM materials such as chromium and build a compact majority-gate-based logic. The potential performance benefits of the majority-gate-based logic are also quantified. Compared to the conventional CMOS logic circuit, the one with AFMFET devices using majority gates can potentially achieve 10x improvement in terms of the EDP.
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