期刊
IEEE ACCESS
卷 9, 期 -, 页码 38778-38791出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/ACCESS.2021.3063901
关键词
Task analysis; Program processors; Job shop scheduling; Genetic algorithms; Energy efficiency; Energy consumption; Network-on-chip; Network-on-chip (NoC); multiprocessor system-on-chip (MPSoC); task scheduling; parallel scheduling
资金
- World Academy of Science (TWAS)
- COMSATS University Islamabad [3240293224]
This article presents energy-aware parallel scheduling techniques aimed at reducing algorithm execution time while considering network load. Experimental results show that the proposed parallel scheduling algorithms achieve a significant reduction in execution time.
Minimizing execution time, energy consumption, and network load through scheduling algorithms is challenging for multi-processor-on-chip (MPSoC) based network-on-chip (NoC) systems. MPSoC based systems are prevalent in high performance computing systems. With the increase in computing capabilities of computing hardware, application requirements have increased many folds, particularly for real world scientific applications. Scheduling large scientific workflows consisting hundreds and thousands of tasks consume significant amount of time and resources. In this article, energy aware parallel scheduling techniques are presented primarily aimed at reducing the algorithm execution time while considering network load. Experimental results reveal that the proposed parallel scheduling algorithms achieve significant reduction in execution time.
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