Interface trap profile near the band edges at the 4H-SiC/SiO2 interface

The transconductance of SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) is typically much lower in devices fabricated on the 4H-SiC polytype compared to 6H. It is believed that this behavior is caused by extreme trapping of inversion electrons due to a higher density of traps D-it at the SiC/SiO2 interface in 4H-SiC. Here we present an approach for profiling D-it versus energy in the band gap using a modified capacitance-voltage technique on large-area MOSFETs. We find that D-it increases towards the conduction band edge E-c in both polytypes, and that D-it is much higher in 4H- compared to 6H-SiC for devices fabricated in the same process lot. (C) 2000 American Institute of Physics. [S0003-6951(00)00516-7].