Integration of sputtered silicon microstructures with pre-fabricated CMOS circuitry

This paper describes a novel fabrication process for creating sputtered silicon microstructures similar to those commonly made using LPCVD polysilicon. Unlike LPCVD polysilicon processes, however, this low-temperature sputtered process is compatible with prefabricated aluminum-metallized CMOS circuitry. Both polyimide and conventional oxide sacrificial layers were used, with the former being removed using oxygen plasma. This dry-release step eliminated the need for critical point drying commonly required for wet releases. To evaluate sputtered silicon for use in MEMS, several properties were investigated, including in-plane stress, strain gradient, density, surface roughness, electrical resistivity, and HF permeability. Tensile stress values lower than 100 MPa were achieved by varying the deposition parameters. Average strain gradients were an inverse square function of thickness. Densities were slightly lower than bulk silicon values. Surface roughness was less than 6 nm rms. The electrical conductivity of the silicon bare films was low but was increased by cladding the sputtered silicon structural layers in symmetric, 50 nm thick layers of titanium-tungsten, Underlying CMOS transistors showed no more than a 3% increase in their maximum saturation current after mechanical layer processing. Finally, to demonstrate the technology, an electrostatically deflected plate structure was fabricated above a capacitance measurement circuit and performance results are presented. (C) 2001 Published by Elsevier Science B.V.