期刊
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
卷 48, 期 12, 页码 1462-1474出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2001.972853
关键词
CMOS analog integrated circuits; chaos generators; chaos
This paper proposes a mixed-signal map-configurable chaos generator suitable for silicon integration, and makes an exhaustive analysis of its error sources and tolerance to the onset of saturation. The developed methodology has been applied in the design, embedded in a complete frequency-modulated differential-chaos shift keying (FM-DCSK) modem [1]-[3], of a chaos generator which achieves 10 bit resolution at a maximum clock frequency of 20 MHz, from a 3.3-V power supply.
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