Piezoresistive accelerometers for MCM package

This paper describes the first steps carried out for the integration of piezoresistive accelerometers in an MCM-D (D-type MultiChip Modules with flip-chip interconnection) package. The bulk micromachined accelerometer technology and its modification to comply with MCM-D packaging technology requirements are presented. The accelerometer technology is based on BESOI (Bond and Etch Back Silicon-On-Insulator) wafers. The main characteristics of this technology is the use of the buried silicon oxide layer as an etch stop and as a sacrificial layer. In addition, over-range protection and self-test systems are defined without any additional photolithographic step or process. The flip chip attachment requires solderable metals in the bump pads. In addition, a sealing ring has been defined around the movable parts of the sensors to protect them from the underfill used during the final packaging process. Cantilever beam accelerometers with a self-test system are presented as example of the combined technology. The design, simulation, fabrication and characterization of the devices prior to the MCM-D packaging are presented as well. The static characterization of the accelerometers shows sensitivities from 0.44 to 1.07 mV/(V.g), nonlinearity, hysteresis and reproducibility below 1% in the range of 1 g. The experimental results are in good agreement with the FEM simulations and they demonstrate the viability of the new technology.