期刊
IEEE JOURNAL OF SOLID-STATE CIRCUITS
卷 38, 期 6, 页码 958-965出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2003.811979
关键词
analog integrated circuits; biosignal amplifier; low noise; low-power circuit design; neural amplifier; noise efficiency factor; subthreshold circuit design; weak inversion
There is a need among scientists and clinicians for low-noise low-power biosignal amplifiers capable of amplifying signals in the millihertz-to-kilohertz range while rejecting large dc offsets generated at the electrode-tissue interface. The advent of fully implantable multielectrode arrays has created the need for fully integrated micropower amplifiers. We designed and tested a novel bioamplifier that uses a MOS-bipolar pseudoresistor element to amplify low-frequency signals down to the millihertz range while rejecting large dc offsets. We derive the theoretical noise-power tradeoff limit-the noise efficiency factor-for this amplifier and demonstrate that our VLSI implementation approaches this limit by selectively operating MOS transistors in either weak or strong inversion. The resulting amplifier, built in a standard 1.5-mum CMOS process, passes signals from 0.025 Hz to 7.2 kHz with an input-referred noise of 2.2 muVrms and a power dissipation of 80 muW while consuming 0.16 mm(2) of chip area. Our design technique was also used to develop an electroencephalogram amplifier having a bandwidth of 30 Hz and a power dissipation of 0.9 muW while maintaining a similar noise-power tradeoff.
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