4.1 Article

A digital hardware pulse-mode neuron with plecewise linear activation function

期刊

IEEE TRANSACTIONS ON NEURAL NETWORKS
卷 14, 期 5, 页码 1028-1037

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNN.2003.816058

关键词

activation function; backpropagation (BP) algorithm; field programmable gate array (FPGA); multilayer neural network; on-chip learning; pulse-mode operation

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This paper proposes a new type of digital pulse-mode neuron that employs piecewise-linear function as its activation function. The neuron is implemented on field programmable gate array (FPGA) and tested be experiments. As well as theoretical analysis, the experimental results show that tire piecewise-linear function of the proposed neuron is programmable and robust against the change in the number of input signals. To demonstrate the effect of piecewise-linear activation function, pulse-mode multilayer neural network with on-chip learning is implemented on PPGA with the proposed neuron, and its learning performance is verified by experiments. By approximating tire sigmoid function by the piecewise-linear function, tire convergence rate of the learning and generalization capability are improved.

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