4.6 Article

Single-electron transistors in heterostructure nanowires

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APPLIED PHYSICS LETTERS
卷 83, 期 10, 页码 2052-2054

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AMER INST PHYSICS
DOI: 10.1063/1.1606889

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Semiconductor-based single-electron transistors have been fabricated using heterostructure nanowire growth, by introducing a double barrier of InP into InAs nanowires. From electrical measurements, we observe a charging energy of 4 meV for the approximately 55 nm diameter and 100 nm long InAs islands between the InP barriers. The Coulomb blockade can be periodically lifted as a function of gate voltage for all devices, which is a typical signature of single-island transistors. Homogeneous InAs nanowires show no such effect for the corresponding voltage ranges. (C) 2003 American Institute of Physics.

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