期刊
IEEE JOURNAL OF SOLID-STATE CIRCUITS
卷 39, 期 12, 页码 2467-2476出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2004.837025
关键词
CMOS SOI capacitive accelerometers; correlated double sampling (CDS); MEMS interface circuit; programmable switched-capacitor amplifier; sigma-delta modulator
This paper presents a 2.5-V 14-bit fully differential SigmaDelta interface circuit in 0.25-mum CMOS technology for a high-resolution silicon-on-insulator capacitive accelerometer fabricated using a simple CMOS-compatible stictionless process. The integrated circuit is based on programmable front-end back-end first-order SigmaDelta architecture and provides a 1-bit pulse-width modulated digital output. Using correlated double sampling, the low-frequency noise is suppressed by 10 dB. Capacitive resolution is 22 aF at 75 Hz (resolution bandwidth = I Hz), equivalent to 110 mug with a dynamic range of 85 dB (14-bit resolution) and a sensitivity of 500 mV/g. The chip occupies 2 mm(2) and consumes 6 mW.
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