A CMOS TV tuner/demodulator IC with digital image rejection

Superheterodyne TV tuners have been implemented in discrete forms using tunable RF and SAW IF filters. Integrating TV tuners in CMOS technology without them is a challenging task to cope with technical issues such as harmonic mixing and image. The image rejection in low- or zero-IF systems has been limited to 30-40 dB by analog imperfections such as I/Q path gain and phase mismatches. A single-chip low-IF TV tuner solution is proposed so that the image can be suppressed digitally using all image cancellation technique based on a complex one-tap LMS signal decorrelation algorithm. Programmable digital filtering and video/sound demodulation make a multistandard TV tuner feasible in the 48-860 MHz VHF/UHF hand. The chip has a maximum gain of 63 dB and an input automatic gain control (AGC) range from -15 to 25 dB with 0.85-dB steps. It achieves an image and IF rejection of 60 dB, a peak carrier-to-noise ratio (CNR) of 55 dB, and a peak sound signal-to-noise ratio (SNR) of 44 dB without frequency modulation (FM) de-emphasis. The prototype occupies 6 x 6 mm(2) in 0.25-mu m CMOS and consumes 1 W at 2.5 V.