Capacitive inter-chip data and power transfer for 3-D VLSI

We report on inter-chip bidirectional communication and power transfer between two stacked chips. The experimental prototype system components were fabricated in a 0.5-mu m silicon-on-sapphire CMOS technology. Bi-directional communication between the two chips is experimentally measured at 1 Hz - 15 MHz. The circuits on the floating top chip are powered with capacitively coupled energy using a charge pump. This is the first demonstration of simultaneous nongalvanic power and data transfer between chips in a stack. The potential use in 3-D VLSI is aimed at reducing costs and complexity that are associated with galvanic inter-chip vias in 3-D integration.