期刊
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
卷 54, 期 2, 页码 268-279出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2006.887598
关键词
current-steering digital-to-analog converters (DACs); glitch; output-dependent delay difference (ODDD); output variation; spurious-free dynamic range (SFDR)
For a current-steering digital-to-analog converter (DAC) without an extra output stage, the variation of the output voltage will result in the variation of the output delay. These output-dependent delay differences will deteriorate the spurious-free dynamic range (SFDR) of a high-speed high-accuracy DAC, especially when glitches exist. In this paper, a convenient mathematical model is presented to analyze during design the impact of this kind of delay differences on the SFDR. The results are verified by comparison to the results of more detailed simulations. Also the impact of glitches on this effect is demonstrated. Possible solutions to reduce this impact are discussed and summarized.
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