4.8 Article

Reduced Graphene Oxide Electrodes for Large Area Organic Electronics

期刊

ADVANCED MATERIALS
卷 23, 期 13, 页码 1558-1562

出版社

WILEY-V C H VERLAG GMBH
DOI: 10.1002/adma.201004161

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  1. UK Engineering and Physical Sciences Research Council (EPSRC) [EP/F023200, EP/F061757]
  2. Royal Society
  3. Research Councils UK (RCUK)
  4. Center for Advanced Structural Ceramics (CASC) at Imperial College London
  5. Engineering and Physical Sciences Research Council [EP/F061757/1] Funding Source: researchfish
  6. EPSRC [EP/F061757/1] Funding Source: UKRI

向作者/读者索取更多资源

Interlayer lithography is used to pattern highly conductive, solution-processed, reduced graphene oxide source and drain electrodes down to 10 mu m gaps. These patterned electrodes allow the fabrication of high-performance organic thin-film transistors and complementary circuits. The method offers a viable route towards organic electronics fabricated entirely by solution processing.

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