Flexible, Low-Voltage, and Low-Hysteresis PbSe Nanowire Field-Effect Transistors

We report low-hysteresis, ambipolar bottom gold contact, colloidal PbSe nanowire (NW) field-effect transistors (FETs) by chemically modifying the silicon dioxide (SiO(2)) gate dielectric surface to overcome carrier trapping at the NW-gate dielectric interface. While water bound to silanol groups at the SiO(2) surface are believed to give rise to hysteresis in FETs of a wide range of nanoscale materials, we show that dehydration and silanization are insufficient in reducing PbSe NW FEE hysteresis. Encapsulating PbSe NW FETs in cured poly(methyl) methacrylate (PMMA), dehydrates and uniquely passivates the SiO2 surface, to form low-hysteresis FETs. Annealing predominantly p-type ambipolar PbSe NW FETs switches the FET behavior to predominantly n-type ambipolar, both with and without PMMA passivation. Heating the PbSe NW devices desorbs surface bound oxygen, even present in the atmosphere of an inert glovebox. Upon cooling, overtime oxygen readsorption switches the FEE polarity to predominantly p-type ambipolar behavior, but PMMA encapsulation maintains low hysteresis. Unfortunately PMMA is sensitive to most solvents and heat treatments and therefore its application for nanostructured material deposition and doping is limited. Seeking a robust, general platform for low-hysteresis FETs we explored a variety of hydroxyl-free substrate surfaces, including silicon nitride, polyimide, and parylene, which show reduced electron trapping, but still large hysteresis. We identified a robust dielectric stack by assembling octadecylphosphonic acid (ODPA) on aluminum oxide (Al(2)O(3)) to form low-hysteresis FETs. We further Integrated the ODPA/Al(2)O(3) gate dielectric stack on flexible substrates to demonstrate low-hysteresis, low-voltage FETs, and the promise of these nanostructured materials In flexible, electronic circuitry.