期刊
2D MATERIALS
卷 5, 期 3, 页码 -出版社
IOP PUBLISHING LTD
DOI: 10.1088/2053-1583/aab672
关键词
MoS2 transistor; h-BN dielectric; heterostructures; subthreshold swing; hysteresis
资金
- Institute for Basic Science [IBS-R011-D1]
- HRD program of the KETEP grant - KGMT [20144030200580]
- Basic Science Research Program through the NRF - Ministry of Science, ICT & Future Planning [NRF-2015R1C1A1A02037387]
While two-dimensional (2D) van der Waals (vdW) layered materials are promising channel materials for wearable electronics and energy-efficient field-effect transistors (FETs), large hysteresis and large subthreshold swing induced by either dangling bonds at gate oxide dielectrics and/or trap molecules in bubbles at vdW interface are a serious drawback, hampering implementation of the 2D-material based FETs in real electronics. Here, we report a monolayer MoS2 FET with near-zero hysteresis reaching 0.15% of the sweeping range of the gate bias, a record-value observed so far in 2D FETs. This was realized by squeezing the MoS2 channel between top h-BN layer and bottom h-BN gate dielectrics and further removing the trap molecules in bubbles at the vdW interfaces via post-annealing. By segregating the bubbles out to the edge of the channel, we also obtain excellent switching characteristics with a minimum subthreshold swing of 63 mV/dec, an average subthreshold slope of 69 mV/dec for a current range of four orders of magnitude at room temperature, and a high on/off current ratio of 10(8) at a small operating voltage (<1 V). Such a near-zero hysteresis and a near-ideal subthreshold limit originate from the reduced trap density of similar to 5.2 x 10(9) cm(-2) eV(-1), a thousand times smaller than previously reported values.
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