Modeling and Elimination of Zero-Sequence Circulating Currents in Parallel Three-Level T-Type Grid-Connected Inverters

Unique pitfalls in parallel three-level T-type inverters (3LT(2) Is) are potential zero-sequence circulating currents (ZSCCs) which are more complex than parallel two-level inverters and can cause current discrepancy, current waveform distortion, power losses, etc. In this paper, the ZSCC paths in the parallel 3LT(2) Is are first presented, and an equivalent model of the ZSCCs is developed. It is seen from this model that the ZSCCs consist of conduction, switching, and hybrid components. Based on the aforementioned analysis, an original sharing neutral bus structure is proposed to eliminate the conduction ZSCCs. With regard to the switching ZSCCs composed of high-frequency and low-frequency harmonics, modified LCL filters are proposed to eliminate the former, and zero-sequence control loops are put forward to suppress the latter. Furthermore, the proposed schemes are also proven to be effective to elimination of the hybrid ZSCCs. Experimental results validate the developed models and the proposed ZSCC elimination schemes.