期刊
IEEE TRANSACTIONS ON NUCLEAR SCIENCE
卷 62, 期 6, 页码 2888-2893出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNS.2015.2497090
关键词
1/f noise; border traps; gate-all-around; high-k dielectric; InGaAs; nanowire; oxide traps; TCAD simulation
资金
- DTRA [HDTRA 1-10-1-0042]
- NSF under MRSEC [DMR 1119826]
InGaAs nanowire (NW) gate-all-around (GAA) MOSFETs exhibit superior radiation hardness compared to planar devices and FinFETs, benefitting from reduced gate-oxide electric fields. Applied gate bias during irradiation, channel thickness, and presence or absence of a forming gas anneal can strongly affect NW device radiation hardness. Low-frequency noise measurements are carried out to probe near-interfacial oxide-trap (border-trap) densities, and TCAD simulations are performed to assist in understanding the charge trapping in NW channel devices with high-k gate dielectrics. Optimized device structures exhibit high radiation tolerance.
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