Pixel-Parallel 3-D Integrated CMOS Image Sensors With Pulse Frequency Modulation A/D Converters Developed by Direct Bonding of SOI Layers

We have developed for the first time a 3-D integrated CMOS image sensor with pixel-parallel analog-to-digital converters (ADCs). Photodiode (PD) and inverter layers are prepared on separate silicon-on-insulator layers and directly bonded with damascened Au electrodes. The handle layer is then removed by grinding and XeF2 vapor phase etching to expose the PD surface. The developed process is suitable for pixelwise interconnection because it allows the damascened Au electrodes to be 1 mu m in diameter or less. An ADC circuit is designed based on pulse frequency modulation where pulses are generated proportional to the illumination intensity, and contains a PD, inverters, a reset transistor, and counters. A prototype 3-D integrated CMOS image sensor is also developed with 64 pixels, which acquires video images without pixel defects. A wide dynamic range of >80 dB is confirmed for the incident light intensity. The experimental results demonstrate the feasibility of pixel-level 3-D integration for high-performance CMOS image sensors.