期刊
IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
卷 9, 期 3, 页码 377-386出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TBCAS.2014.2354054
关键词
Atrial fibrillation; loop recorder; low-power; subthreshold; ultra-low voltage
资金
- Swedish Research Council [621-2011-4540]
- Swedish VINNOVA Industrial Excellence Centre (SoS)
- NIH [R15HL121761]
A real-time detector for episodes of atrial fibrillation is fabricated as an application specific integrated circuit (ASIC). The basis for detection is a set of three parameters for characterizing the RR interval series, i.e., turning point ratio, root mean square of successive differences, and Shannon entropy. The developed hardware architecture targets ultra-low voltage operation, suitable for implantable loop recorders with ultra-low energy requirements. Algorithmic and architectural optimizations are performed to minimize area and energy dissipation, with a total area footprint reduction of 44%. The design is fabricated in 65-nm CMOS low-leakage high-threshold technology. Measurements with aggressively scaled supply voltage (V-DD) in the subthreshold (sub-V-T) region show energy savings of up to 41 X when operating at 1 kHz with a V-DD of 300 mV compared to a nominal of V-DD 1.2 V.
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