期刊
IEEE ELECTRON DEVICE LETTERS
卷 36, 期 9, 页码 887-889出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2015.2455556
关键词
Complementary-metal-oxide-semiconductor (CMOS); nano-electromechanical (NEM) memory switch; three-dimensional (3D) integration; reconfigurable cicuit
资金
- NRF of Korea - MSIP (Mid-Career Researcher Program) [NRF-2015003565]
- IITP - MSIP (Information Technology Research Center) [IITP-2015-H8501-15-1002]
- MOTIE/KSRC (Future Semiconductor Device Technology Development Program) [10044842]
- Korea Evaluation Institute of Industrial Technology (KEIT) [10044842] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
- Ministry of Public Safety & Security (MPSS), Republic of Korea [H8501-15-1002] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
- National Research Foundation of Korea [22A20130012145, 2015R1A2A2A01003565] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
Complementary-metal-oxide-semiconductor (CMOS) and nanoelectromechanical (NEM) hybrid reconfigurable circuits are implemented for the first time using three-dimensional (3D) integration process. In addition, their operation is confirmed experimentally. For the fabrication of the 3D CMOS-NEM hybrid reconfigurable circuits, only the standard CMOS baseline process has been used except for the hydrofluoric acid vapor etch to release the NEM structures and focused-ion-beam patterning to define small patterns.
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