期刊
JOURNAL OF APPLIED PHYSICS
卷 123, 期 18, 页码 -出版社
AMER INST PHYSICS
DOI: 10.1063/1.5027822
关键词
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资金
- UK Engineering and Physical Sciences Research Council [EP/K014471/1, EP/N01202X/1]
- EPSRC [EP/N01202X/1, EP/N01202X/2, EP/K014471/1] Funding Source: UKRI
In a bid to understand the commonly observed hysteresis in the threshold voltage (V-TH) in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors during forward gate bias stress, we have analyzed a series of measurements on devices with no surface treatment and with two different plasma treatments before the in-situ Al2O3 deposition. The observed changes between samples were quasi-equilibrium V-TH, forward bias related V-TH hysteresis, and electrical response to reverse bias stress. To explain these effects, a disorder induced gap state model, combined with a discrete level donor, at the dielectric/semiconductor interface was employed. Technology Computer-Aided Design modeling demonstrated the possible differences in the interface state distributions that could give a consistent explanation for the observations. Published by AIP Publishing.
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