4.7 Article

Channel Estimation in Broadband Millimeter Wave MIMO Systems With Few-Bit ADCs

期刊

IEEE TRANSACTIONS ON SIGNAL PROCESSING
卷 66, 期 5, 页码 1141-1154

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TSP.2017.2781644

关键词

Low resolution analog-to-digital converter; millimeter wave; channel estimation; approximate message passing

资金

  1. National Science Foundation [CCF-1527079, CCF-1527162]
  2. Direct For Computer & Info Scie & Enginr
  3. Division of Computing and Communication Foundations [1527079] Funding Source: National Science Foundation

向作者/读者索取更多资源

We develop a broadband channel estimation algorithm for millimeter wave (mm Wave) multiple input multiple output (MIMO) systems with few-bit analog-to-digital converters (ADCs). Our methodology exploits the joint sparsity of the mm Wave MIMO channel in the angle and delay domains. We formulate the estimation problem as a noisy quantized compressed-sensing problem and solve it using efficient approximate message passing (AMP) algorithms. In particular, we model the angle-delay coefficients using a Bernoulli-Gaussian-mixture distribution with unknown parameters and use the expectation-maximization forms of the generalized AMP and vector AMP algorithms to simultaneously learn the distributional parameters and compute approximately minimum mean-squared error (MSE) estimates of the channel coefficients. We design a training sequence that allows fast, fast Fourier transform based implementation of these algorithms while minimizing peak-to-average power ratio at the transmitter, making our methods scale efficiently to large numbers of antenna elements and delays. We present the results of a detailed simulation study that compares our algorithms to several benchmarks. Our study investigates the effect of SNR, training length, training type, ADC resolution, and runtime on channel estimation MSE, mutual information, and achievable rate. It shows that, in a mm Wave MIMO system, the methods we propose to exploit joint angle-delay sparsity allow 1-bit ADCs to perform comparably to infinite-bit ADCs at low SNR, and 4-bit ADCs to perform comparably to infinite-bit ADCs at medium SNR.

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