期刊
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
卷 65, 期 3, 页码 1143-1153出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2017.2759767
关键词
Charge pump; charge transfer switches; complementary branch; high efficiency; low-power on-chip applications
资金
- Natural Sciences and Engineering Research Council of Canada
- China Scholarship Council
- Alberta Innovates Technology Futures
This paper proposes charge pumps with improved power efficiency suitable for low-power on-chip applications. Undesired charge transfer, which has a direction opposite to that of the intended current flow, presents a significant source of power loss in charge pumps. The proposed charge pump circuit utilizes charge transfer switches with a complementary branch scheme to significantly reduce undesired charge transfer, thereby improving power efficiency and increasing output voltage effectively. An optimized gate control strategy is applied to further decrease the power loss caused by undesired charge transfer. Simulations of 8-stage charge pumps in a 0.13 mu m standard CMOS technology show that for an input supply voltage of 1.2 V, the proposed charge pump circuit reaches a power efficiency of 58.72% with an output voltage of 7.45 V, when delivering 5-mA load current, and is able to maintain a power efficiency of around 50% and an output voltage of over 5 V as the load current increases to 10 mA. Compared with the other charge pump circuits, the simulation results demonstrate better performance of proposed charge pump circuits in terms of both voltage pumping gain and power efficiency.
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