期刊
IEEE JOURNAL OF SOLID-STATE CIRCUITS
卷 53, 期 8, 页码 2399-2414出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2018.2822691
关键词
Advanced Encryption Standard (AES); correlation power analysis (CPA); countermeasure; information leakage; integrated voltage regulator; power attack; side-channel-attack; template attack; test vector leakage assessment (TVLA)
资金
- Intel Corporation
- National Science Foundation [1218745]
- Semiconductor Research Corporation [1836.110]
- Division Of Computer and Network Systems
- Direct For Computer & Info Scie & Enginr [1218745] Funding Source: National Science Foundation
This paper demonstrates an integrated inductive voltage regulator (IVR) for improving power side-channel-attack (PSCA) resistance of 128-bit Advanced Encryption Standard (AES-128) engines. An inductive IVR is shown to transform the current signatures generated by an encryption engine. Furthermore, an all-digital circuit block, referred to as the loop-randomizer, is introduced to randomize the IVR transformations. A 130-nm test-chip with an inductive IVR with 11.6-nH inductance, 3.2-nF capacitance, and 125-MHz switching frequency is used to drive two different architectures of AES-128 engine: high performance and low power. The measurements demonstrate that the IVR with loop randomizer eliminates information leakage while incurring only 3% overhead in performance and 5% overhead in power over a baseline IVR-AES system. Moreover, while a key-byte can be extracted for the standalone high-performance and low-power AES (LP-AES) with only 5000 and 1000 measurements, respectively, the proposed IVR inhibits key extraction even with 500 000 measurements.
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