期刊
IEEE JOURNAL OF SOLID-STATE CIRCUITS
卷 53, 期 5, 页码 1328-1337出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2017.2784758
关键词
79 GHz; automotive; dual loop; fractional-N; frequency-modulated continuous wave (FMCW); low noise; millimeter-wave radar; phase noise; phase-locked loop (PLL); radar; SiGe; W-band
The implementation of wideband mm-wave radars for automotive applications necessitates wideband, fast, and precise linear frequency modulation generation. In this paper, we propose to use dual-loop phase-locked loop (PLL) architecture for this task. The frequency modulation dynamics are analyzed for this architecture. The results are employed to implement a SiGe BiCMOS fully integrated 75-83 GHz frequency-modulated continuous-wave synthesizer. Performance enhancements were achieved by utilizing the bulk-drain parasitic variable capacitance of P-channel transistors, embedded in a gm-boosted Colpitts VCO, for frequency control. This mechanism together with the dual-loop PLL architecture provides low loop bandwidth variation over the whole output frequency range, -97 dBc/Hz phase noise at 1-MHz offset, and maximal modulation rate of 100 GHz/ms.
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