3.8 Proceedings Paper

Power Delivery Design and Analysis of 14nm Multicore Server CPUs with Integrated Voltage Regulators

出版社

IEEE COMPUTER SOC
DOI: 10.1109/ECTC.2016.322

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Fully Integrated Voltage Regulator; Air Core Inductor; Efficiency; Loop gain; Droop; Passive Correlation; Process scaling

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Intel (R) introduced a novel power delivery scheme utilizing Fully Integrated Voltage Regulators (FIVRs) in the Xeon (R) line of microprocessors fabricated using the 22nm process technology. In this paper, some of the implications of integrating FIVR in the context of Moore's law scaling are addressed. As the Xeon r line is scaled from a 22nm process to a 14nm process, circuit blocks on-die (such as the Core) shrink and the passives required for FIVR are scaled in tandem and optimized. This allows FIVR to continue delivering a compelling power performance benefit to support the scaling of the die. In this paper, an optimized 14nm FIVR power delivery design is presented. The performance metrics of FIVR such as efficiency and transient response were measured and correlated to pre- and post-silicon simulations.

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