4.7 Article Proceedings Paper

n-Type Si solar cells with passivating electron contact: Identifying sources for efficiency limitations by wafer thickness and resistivity variation

期刊

SOLAR ENERGY MATERIALS AND SOLAR CELLS
卷 173, 期 -, 页码 96-105

出版社

ELSEVIER
DOI: 10.1016/j.solmat.2017.05.042

关键词

Silicon solar cells; Passivating contacts; Device simulation; Power loss analysis; Impurity recombination

资金

  1. US Department of Energy [DE-EE0006336]
  2. German Federal Ministry for Economic Affairs and Energy [0325292]

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In this work, the efficiency of n-type silicon solar cells with a front side boron-doped emitter and a full-area tunnel oxide passivating electron contact was studied experimentally as a function of wafer thickness W and resistivity rho(b). Conversion efficiencies in the range of 25.0% have been obtained for all variations studied in this work, which cover 150 mu m to 400 gm thick wafers and resistivities from 1 Omega cm to 10 Omega cm. We present a detailed cell analysis based on three-dimensional full-area device simulations using the solar cell simulation tool Quokka. We show that the experimental variation of the wafer thickness and resistivity at device level in combination with a detailed simulation study allows the identification of recombination induced loss mechanisms. This is possible because different recombination mechanisms can have a very specific influence on the I-V parameters as a function of W and rho(b). In fact, we identified Shockley-Read-Hall recombination in the c-Si bulk as the source of a significant FF reduction in case of high resistivity Si. This shows that cells made of high resistivity Si are very sensitive to even a weak lifetime limitation in the c-Si bulk. Applying low resistivity 1 Omega cm n-type Si in combination with optimized fabrication processes, we achieved confirmed efficiency values of 25.7%, with a V-oc of 725 mV, a FF of 83.3% and a J(sc) of 42.5 mA/cm(2). This represents the highest efficiency reported for both-sides contacted c-Si solar cells. Thus, the results presented in this work demonstrate not only the potential of the cell structure, but also that a variation of the wafer thickness and resistivity at device level can provide deep insights into the cell performance.

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