3.8 Proceedings Paper

Real-Time Binocular Stereo Vision System Based on FPGA

出版社

SPIE-INT SOC OPTICAL ENGINEERING
DOI: 10.1117/12.2500769

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Binocular Stereo Vision; FPGA; Stereo Correspondence; Depth Sensing

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Binocular stereo vision, as a typical technique of computer vision, is versatile in three-dimensional shape measurement. However, the efficiency and speed are limited by the inherent instruction cycle delay within traditional computers, leading to large quantities of image data and computational complexity. Consequently, this paper describes a real-time binocular stereo vision system based on FPGA implementation. Considering FPGA's parallel architecture, both in storing and calculating, the whole system is a full-pipeline design and synchronized with the identical system clock so that different parts of the stereo processing can work simultaneously to improve the processing speed. As the complete image processing framework contains rectification, stereo correspondence and the left-right consistency check is realized by only one FPGA chip without other external devices, making system highly integrated and low cost. To avoid unnecessary cost of the FPGA resource, the dual-camera calibration is done offline by MFC-based software while the intrinsic and extrinsic parameters are transmitted into the FPGA through system interaction.

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