3.8 Proceedings Paper

Formal Guarantees in Data-Driven Model Identification and Control Synthesis

出版社

ASSOC COMPUTING MACHINERY
DOI: 10.1145/3178126.3178145

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Model Identification; Control Synthesis; Signal Temporal Logic

资金

  1. NSF [IIS-1723995, CPS-1446151, CMMI-1400167]

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For many performance-critical control systems, an accurate (simple) model is not available in practice. Thus, designing controllers with formal performance guarantees is challenging. In this paper, we develop a framework to use input-output data from an unknown system to synthesize controllers from signal temporal logic (STL) specifications. First, by imposing mild assumptions on system continuity, we find a set-valued piecewise a fine (PWA) model that contains all the possible behaviors of the concrete system. Next, we introduce a novel method for STL control of PWA systems with additive disturbances. By taking advantage of STL quantitative semantics, we provide lower-bound certificates on the degree of STL satisfaction of the closed-loop concrete system. Illustrative examples are presented.

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