期刊
IEEE ACCESS
卷 7, 期 -, 页码 31151-31158出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/ACCESS.2019.2901721
关键词
Half-mode substrate integrated wavguide (HMSIW); low sidelobe level (SLL); sparse array; wide-angle scanning phased array
资金
- National Natural Science Foundation of China [61731005, 61771407]
- Aeronautical Science Foundation of China [ASFC-20162080008]
This paper introduces the concept of the sparse array into the design of a wide-angle scanning phased array to obtain the low sidelobe level (SLL). The adopted array element is a half-mode substrate integrated waveguide slot array, which can radiate a high-gain and wide-beam pattern in the E-plane. A 16-element phased array with an optimized non-periodic array element arrangement, which is obtained by a semi-full-wave simulation-based synthesis method, is designed and studied. Compared with two periodic arrays with the same array element and element number, the sparse one exhibits the advantage of low SLL. Besides, the designed phased array has an ultra-low profile of only about 0.017 lambda(0). A prototype is fabricated and measured, and measured results show that the proposed array can scan its main beam from -70 degrees to +70 degrees with a realized gain higher than 18.2 dBi and peak SLL lower than -15 dB.
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