4.7 Article

Interfacial Effects during Rapid Lamination within MAPbI3 Thin Films and Solar Cells

期刊

ACS APPLIED ENERGY MATERIALS
卷 2, 期 7, 页码 5083-5093

出版社

AMER CHEMICAL SOC
DOI: 10.1021/acsaem.9b00747

关键词

perovskite; solar cell; photovoltaics; lamination; interfacial reaction

资金

  1. ONR [N00014-17-1-2207]
  2. National Science Foundation, National Nanotechnology Coordinated Infrastructure [ECCS-1542015]
  3. Fitzpatrick Institute for Photonics John T. Chambers Scholarship

向作者/读者索取更多资源

Although hybrid halide perovskite solar cells (PSCs) have recently reached record efficiency among thin film photovoltaic technologies, the stability of these devices remains a pressing problem for commercialization. Lamination processes represent an attractive means of fabricating PSCs due to their self-encapsulating nature and compatibility with high-throughput manufacturing methods. These techniques often involve high temperature and pressure, which represents an underexplored region of the perovskite processing parameter space. In this work, we investigate the behavior of the archetypal halide perovskite, methylammonium lead iodide (MAPbI(3)), under elevated temperatures and pressures. We also characterize the interactions of MAPbI(3) with the commonly used electron and hole transport layers (ETL and HTL) SnO, and NiO and find that the latter is particularly susceptible to detrimental interactions at temperatures not far above those commonly used in conventional perovskite film deposition techniques, with deleterious effects on device performance. SnO2 can also evince reactions with the perovskite precursor methylammonium iodide but is more robust than NiOx Applying the above knowledge, we investigate a laminated bifacial device fabrication strategy that mitigates intrinsic and interface-related threats to the perovskite absorber and report that such devices can reach power conversion efficiencies of >12%. These results not only advance the state of the art in laminated PSCs but also reveal heretofore unknown interactions in commonplace device architectures that should be taken into account when developing device fabrication schemes.

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