3.8 Proceedings Paper

A 0.3 V, 35% Tuning-Range, 60 kHz 1/f3-Corrier Digitally Controlled Oscillator with Vertically Integrated Switched Capacitor Banks Achieving FoMT of 499 dB in 28nrn CMOS

出版社

IEEE
DOI: 10.1109/CICC.2019.8780295

关键词

Ultra-low voltage; ultra-low power; sub-mW; low flicker phase noise; class-C oscillator; DCO; transformer; Internet-of-Things (IoT)

资金

  1. Science Foundation Ireland [14/RP/I2921]
  2. Analog Devices in Cork, Ireland
  3. Science Foundation Ireland (SFI) [14/RP/I2921] Funding Source: Science Foundation Ireland (SFI)

向作者/读者索取更多资源

We present a sub-mW ultra-low-voltage (ULV) digitally controlled oscillator (DCO) in which all electronic devices (amplifying transistors and switched-capacitor banks) are vertically embedded within the inductor coils. A special arrangement of native layer (NT_N) diminishes any adverse effects on the inductors. To suppress flicker noise upconversion while maintaining wide tuning range (TR), we propose a technique of reduced current conduction angle. Its robust start-up is ensured by a passive gain of the proposed high-k(m) 2:3 transformer, which is an advantage over the current approaches in class-C oscillators. Implemented in 28-nm CIVIOS, the proposed DCO achieves-95 dBcillz and 418 dBc/Ilz at 100 kHz and 1 MHz offsets, respectively. The measured 1/f(3) corner is from 60 kHz to 100 kHz over the 35% TR (from 2,02 GHz to 2.87 GHz). This results in a figure-of-merit with normalized TR (FoM(T)) at 100 kHz and 1MHz offsets of-196dB and-199 dB, respectively, which is a record among <0.5 V and <1 rnW oscillators.

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