期刊
IEEE ACCESS
卷 8, 期 -, 页码 112297-112308出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/ACCESS.2020.3003009
关键词
Phase locked loops; Band-pass filters; Frequency estimation; Resonant frequency; Inverters; Periodic structures; Frequency synchronization; DC offset; inverters; phase-locked loop (PLL); second order generalized integral
资金
- National Natural Science Foundation of China [61863003]
- Natural Science Foundation of Hunan Province of China [2018JJ3690]
- Natural Science Foundation of Guangxi Province [2018GXNSFDA281037]
Synchronous reference frame phase-locked loop (SRF-PLL) is widely used for grid voltage synchronization in single-phase grid-connected power converters. However, in the actual situation, dc offset component may be introduced in the input of the PLL, due to the transient fault of the power grid, sampling and measurement error, or A/D signal processing. A simple yet effective approach with additional all-pass filter based dc rejecter is presented for SRF-PLL, in this paper. Thereby, correct estimation and undesirable periodic ripple free can be achieved in SRF-PLL, when the input signal contains dc offset. The second order generalized integrator based PLL (SOGI-PLL) is first introduced, followed by the analysis on influence of the input dc offsets in SRF-PLL. The structure of enhanced-SOGI (ESOGI) with its analysis of dc offset rejection effects and performance have been then formulated in detail. Finally, experimental results are presented to demonstrate the effectiveness of the proposed ESOGI based PLL.
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