4.6 Article

Autonomous Probabilistic Coprocessing With Petaflips per Second

期刊

IEEE ACCESS
卷 8, 期 -, 页码 157238-157252

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/ACCESS.2020.3018682

关键词

Neurons; Clocks; Hardware; Probabilistic logic; Stochastic processes; Synapses; Biological neural networks; Probabilistic logic; Boltzmann machines; Ising machines; neural network hardware; combinatorial optimization; quantum Monte Carlo

资金

  1. ASCENT, one of six centers in JUMP, a Semiconductor Research Corporation (SRC) Program - DARPA
  2. Center for Probabilistic Spin Logic for Low-Energy Boolean and Non-Boolean Computing (CAPSL), one of the Nanoelectronic Computing Research (nCORE) Centers, a Semiconductor Research Corporation (SRC) Program - NSF

向作者/读者索取更多资源

In this article we present a concrete design for a probabilistic (p-) computer based on a network of p-bits, robust classical entities fluctuating between -1 and +1, with probabilities that are controlled through an input constructed from the outputs of other p-bits. The architecture of this probabilistic computer is similar to a stochastic neural network with the p-bit playing the role of a binary stochastic neuron, but with one key difference: there is no sequencer used to enforce an ordering of p-bit updates, as is typically required. Instead, we explore sequencerless designs where all p-bits are allowed to flip autonomously and demonstrate that such designs can allow ultrafast operation unconstrained by available clock speeds without compromising the solution's fidelity. Based on experimental results from a hardware benchmark of the autonomous design and benchmarked device models, we project that a nanomagnetic implementation can scale to achieve petaflips per second with millions of neurons. A key contribution of this article is the focus on a hardware metric - flips per second - as a problem and substrate-independent figure-of-merit for an emerging class of hardware annealers known as Ising Machines. Much like the shrinking feature sizes of transistors that have continually driven Moore's Law, we believe that flips per second can be continually improved in later technology generations of a wide class of probabilistic, domain specific hardware.

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