期刊
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
卷 64, 期 11, 页码 9001-9011出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TIE.2017.2721882
关键词
dv/dt-induced false turn on; parasitic effect; SiC MOSFET switching analysis; shoot-through current; soft-switching; switching losses
资金
- U.K. Engineering and Physical Sciences Research Council National Centre for Power Electronics within the Converters Theme [EP/K035096/1]
- EPSRC [EP/K035096/1] Funding Source: UKRI
- Engineering and Physical Sciences Research Council [EP/K035096/1] Funding Source: researchfish
Circuit-level analytical models for hardswitching, soft-switching, and dv/dt-induced false turn on of SiC MOSFETs and their experimental validation are described. The models include the high-frequency parasitic components in the circuit and enable fast, accurate simulation of the switching behavior using only datasheet parameters. To increase the accuracy of models, nonlinearities in the junction capacitances of the devices are incorporated by fitting their nonlinear curves to a simple equation. The numerical solutions of the analytical models provide more accurate prediction than an LTspice simulation with a threefold reduction in the simulation time. The analytical models are evaluated at 25 degrees C and 125 degrees C. The effect of snubber capacitors on the soft-switching waveforms is explained analytically and validated experimentally, which enables the techniques to be used to evaluate future soft-switching solutions. Finally, the dv/dt-induced false turn-on conditions are predicted analytically and validated experimentally. It was observed that consideration of nonlinearities in the junction capacitances ensures accurate prediction of false turn on, and that the small shoot-through current due to false turn on can increase the switching loss by 8% for an off-state gate bias of -2 V.
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