期刊
IEEE ACCESS
卷 8, 期 -, 页码 211464-211473出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/ACCESS.2020.3038856
关键词
Interface trap density; border trap density; quantum mechanical effect; high-k; III-V substrate
资金
- National Research Foundation of Korea (NRF) - Korea Government [Ministry of Science and ICT (MSIT)] [2019R1A2C1009816]
- National Research Foundation of Korea [2019R1A2C1009816] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
We investigated the effects of quantum confinement in determining the interface traps (Dit) and border traps (N-bt) of ALD deposited Al2O3 with temperature variations onto InxGa1-xAs on a 300-mm Si (001) substrate. We also analysed the impact of these effects on the total gate capacitance of high-k/Si and high-k/InxGa1-xAs structures using 1D Poisson-Schrodinger solver simulation tool (Nextnano). While quantum confinement has no or very little impact on the gate capacitance of high-k /Si structure, it has a considerably high amount of impact on the high-k/InxGa1-xAs structures and substantially lowers the total gate capacitance. To refiect the actual thickness between the insulator-semiconductor interface and charge centroid, capacitance-equivalent-thickness was used to refiect the effects of quantum confinement in the InxGa1-xAs layer. The Dit and Nbt values extracted using capacitance-equivalent-thickness were observed to be around 10% and 25%, respectively, higher than the values of extraction with equivalent-oxide-thickness.
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