期刊
IEEE ACCESS
卷 9, 期 -, 页码 21251-21257出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/ACCESS.2021.3056190
关键词
Prefetching; Hardware; Probes; Side-channel attacks; Reverse engineering; Reliability; Timing; Hardware prefetching; Flush plus Reload; reverse engineering
资金
- National Training Programs of Innovation and Entrepreneurship for Undergraduates in China
Hardware prefetching can interfere with Flush+Reload cache side channel attack, but an improved method provided in this paper minimizes this impact effectively.
Hardware prefetching can seriously interfere with Flush+Reload cache side channel attack. This interference is not taken into consideration in previous Flush+Reload attacks. In this paper, an improved Flush+Reload is provided which minimizes the impact of hardware prefetchers. Specifically, prefetching is analyzed based on reverse engineering and the result is used to make an evaluation model to evaluate the impact of hardware prefetching on Flush+Reload attacks. Then the model is applied to fine tune the placement of probes in Flush+Reload attack to mitigate the prefetching impact. The experiments show that the approach is effective on the Core i5 processor which is equipped with highly aggressive prefetchers.
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