相关参考文献
注意:仅列出部分参考文献,下载原文获取全部文献信息。A 7-nm Compute-in-Memory SRAM Macro Supporting Multi-Bit Input, Weight and Output and Achieving 351 TOPS/W and 372.4 GOPS
Mahmut E. Sinangil et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2021)
A 28-nm Compute SRAM With Bit-Serial Logic/Arithmetic Operations for Programmable In-Memory Vector Computing
Jingcheng Wang et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2020)
A Twin-8T SRAM Computation-in-Memory Unit-Macro for Multibit CNN-Based AI Edge Processors
Xin Si et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2020)
C3SRAM: An In-Memory-Computing SRAM Macro Based on Robust Capacitive Coupling Computing Mechanism
Zhewei Jiang et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2020)
A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors
Yen-Cheng Chiu et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2020)
XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks
Shihui Yin et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2020)
A Power-Efficient Optimizing Framework FPGA Accelerator Based on Winograd for YOLO
Chun Bao et al.
IEEE ACCESS (2020)
Deep Physical Informed Neural Networks for Metamaterial Design
Zhiwei Fang et al.
IEEE ACCESS (2020)
CNN Acceleration With Hardware-Efficient Dataflow for Super-Resolution
Sumin Lee et al.
IEEE ACCESS (2020)
CONV-SRAM: An Energy-Efficient SRAM With In-Memory Dot-Product Computation for Low-Power Convolutional Neural Networks
Avishek Biswas et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2019)
Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays
Amogh Agrawal et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2019)
A 28-nm 320-Kb TCAM Macro Using Split-Controlled Single-Load 14T Cell and Triple-Margin Voltage Sense Amplifier
Cheng-Xin Xue et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2019)
A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors
Xin Si et al.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS (2019)
Speech Recognition Using Deep Neural Networks: A Systematic Review
Ali Bou Nassif et al.
IEEE ACCESS (2019)
A 5.1pJ/Neuron 127.3us/Inference RNN-based Speech Recognition Processor using 16 Computing-in-Memory SRAM Macros in 65nm CMOS
Ruiqi Guo et al.
2019 SYMPOSIUM ON VLSI CIRCUITS (2019)
A Novel Software-Defined Convolutional Neural Networks Accelerator
Yufeng Li et al.
IEEE ACCESS (2019)
Face Detection Method Based on Cascaded Convolutional Networks
Rong Qi et al.
IEEE ACCESS (2019)
MulNet: A Flexible CNN Processor With Higher Resource Utilization Efficiency for Constrained Devices
Muluken Tadesse Hailesellasie et al.
IEEE ACCESS (2019)
A Multi-Functional In-Memory Inference Processor Using a Standard 6T SRAM Array
Mingu Kang et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2018)
Applications of Deep Learning and Reinforcement Learning to Biological Data
Mufti Mahmud et al.
IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS (2018)
Training Deep Neural Networks for the Inverse Design of Nanophotonic Structures
Dianjing Liu et al.
ACS PHOTONICS (2018)
Low Cost Convolutional Neural Network Accelerator Based on Bi-Directional Filtering and Bit-Width Reduction
Woong Choi et al.
IEEE ACCESS (2018)
In-Memory Computation of a Machine-Learning Classifier in a Standard 6T SRAM Array
Jintao Zhang et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2017)
An Energy-Efficient Precision-Scalable ConvNet Processor in 40-nm CMOS
Bert Moons et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2017)
Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks
Yu-Hsin Chen et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2017)
Deep Neural Networks for Acoustic Modeling in Speech Recognition
Geoffrey Hinton et al.
IEEE SIGNAL PROCESSING MAGAZINE (2012)
A 3-GHz 70-Mb SRAM in 65-nm CMOS technology with integrated column-based dynamic power supply
K Zhang et al.
IEEE JOURNAL OF SOLID-STATE CIRCUITS (2006)