The properties, effect and extraction of localized defect profiles from degraded FET characteristics

We report simulations of localized defect profiles (DPs), typical for hot-carrier degradation (HCD), with exponential- and step-like shapes. First, we analyze how these localized DPs affect the transistor I-V and model the complex relation between DP and FET degradation by considering the degraded FET as a series circuit of an undegraded transistor (the source side) and a degraded one (the drain side). We also compare how the same DP causes different degradation for changes in the device structure. Second, we use the DP simulations to qualitatively understand the DP dependence on stress voltages in measured FETs and assess how uniquely a DP can be extracted from degraded I-V metrics. The results are of interest for HCD modeling.

Automated summary

This study investigates the impact of localized defect profiles on hot-carrier degradation, analyzing the complex relationship between DP and FET degradation as well as the different degradation caused by the same DP in varying device structures. Additionally, the DP simulations are used to understand qualitatively the DP's dependence on stress voltages in FETs and assess the unique extraction of a DP from degraded I-V metrics. The results have implications for HCD modeling.