MTMR-SNQM: Multi-Tunnel Magnetoresistance Spintronic Non-volatile Quaternary Memory

Multi-value logic (MVL) is one of the options considered by researchers to overcome the limitations of the conventional binary logic because of their remarkable features such as lower transmission power consumption, lower area, interconnect, and pins. Quaternary logic is one of the forms of MVLs that has received special attention due to its compatibility with binary logic. In this paper, a quaternary non-volatile memory cell is designed and simulated using the threshold voltage tunability feature of gate-all-around carbon nanotube field-effect transistor transistors (GAA-CNTFET) and non-volatile property of the magnetic tunnel junctions (MTJ). The simulation results show that while our proposed quaternary memory occupies a smaller area than the existing non-volatile quaternary memory, it consumes 31% and 33% lower average and static power, respectively. The Monte-Carlo simulations also show the correct operation of the proposed memory even in the presence of process variations.

Automated summary

In this study, a quaternary non-volatile memory cell was designed and simulated using the threshold voltage tunability of gate-all-around carbon nanotube field-effect transistor transistors (GAA-CNTFET) and non-volatile property of the magnetic tunnel junctions (MTJ). The simulation results demonstrated that the proposed memory cell occupies a smaller area and consumes lower power compared to existing non-volatile quaternary memory, with correct operation even in the presence of process variations shown in Monte-Carlo simulations.