4.6 Article

4-Channel, 100 Gbps Inductorless Optical Receiver Analog Front-End in CMOS for Optical Interconnect

期刊

IEEE ACCESS
卷 9, 期 -, 页码 131780-131788

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/ACCESS.2021.3114499

关键词

Active feedback; cross-coupled feedback; limiting amplifier; negative and positive feedback; optical receiver; transimpedance amplifier

资金

  1. National Key Research and Development Program of China [2018YFE0202500, 2017YFB0403602]
  2. National Natural Science Foundation of China [61774113, 61874104]

向作者/读者索取更多资源

This paper presents a 4-channel, 100 Gbps inductorless optical receiver analog front-end fabricated in a 55 nm bulk-CMOS technology. Active feedback technique, common gate amplifier, and multistage limiting amplifier are employed to improve performance, achieving high bandwidth and gain while saving space.
In this paper, a 4-channel, 100 Gbps inductorless optical receiver analog front-end fabricated in a 55 nm bulk-CMOS technology is presented. Active feedback technique is widely adopted to improve the performance of the optical receiver without the area-occupied inductors. To alleviate the voltage headroom stress of the local feedback loop in traditional regulated cascode transimpedance amplifier, the common gate amplifier is inserted before the traditional common source feedback stage. And the cross-couple active feedback stage provides a negative signal path to extend the bandwidth of the local feedback loop. Multistage limiting amplifier with active negative and positive feedback stages are employed to extend bandwidth and acquire high gain simultaneously. The optical receiver was realized as 4-element arrays occupying the area of 800 mu m x 1800 mu m, whereas the core area of each channel is just 275 mu m x 650 mu m. The measured 3-dB bandwidth reaches 22.8 GHz, sufficient for 25-Gbps operation. For an input voltage of 2.5 mV(p-p), the optical receiver achieves a BER = 10(-12) at 25-Gbps PRBS7, and 310 mV differential output voltage is delivered. From the supply voltage of 1.2 V, the test chip consumes the power of 226 mW and exhibits the power efficiency of 2.3 mW/Gb/s, when 25-Gbps PRBS31 is supplied.

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