4.6 Article

A PWM Nie-Tan Type-Reducer Circuit for a Low-Power Interval Type-2 Fuzzy Controller

期刊

IEEE ACCESS
卷 9, 期 -, 页码 158773-158783

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/ACCESS.2021.3131877

关键词

Analog integrated circuits; fuzzy hardware; interval type-2 fuzzy logic; low-power

资金

  1. Conselho Nacional de Desenvolvimento Cientico e Tecnologico (CNPq), Brazil
  2. Coordenacao de Aperfeicoamento de Pessoal de Nivel Superior (CAPES), Brazil

向作者/读者索取更多资源

A novel Type-Reduction/Defuzzification circuit architecture is proposed for an analog interval type-2 fuzzy inference system. The circuit operates with current-mode inputs and generates a PWM output, making it simple and suitable for various control applications. Additionally, it achieves very low power consumption, allowing its use in power-restrained environments.
A novel Type-Reduction/Defuzzification circuit architecture for an analog interval type-2 fuzzy inference system is proposed. Based on the Nie-Tan type-reduction method, the circuit operates with current-mode inputs, representing the firing intervals of the rules created by the inference engine, and generating a PWM output. It is demonstrated that by selecting an appropriate number of consequents it is possible to create the PWM output directly, without the need for analog multiplier/divider circuits. This feature makes the circuit very simple, aiding in the design process, while the PWM output makes it suitable for controlling DC-DC converters, maximum power point trackers (MPPT) for energy generators, or other switching applications. It is designed to achieve very low power consumption, allowing its use in power restrained environments, such as energy harvesting systems. The circuit was designed using TSMC 0.18 mu m technology, in CADENCE Virtuoso software, and simulated for different combinations of input values, demonstrating its capabilities. It was also simulated as part of a type-2 fuzzy inference system with two inputs, nine rules, and firing intervals represented by currents within 0 and 10 mu A. The circuit was prototyped, and the experimental average power consumption was only 53.8 mu W, validating its low power consumption characteristic.

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