期刊
出版社
IEEE
DOI: 10.1109/SISPAD54002.2021.9592592
关键词
3D integration; low-temperature synthesis; 2D materials; topological materials; interconnects
类别
资金
- Semiconductor Research Corporation (SRC) through the IMPACT center
- Semiconductor Research Corporation (SRC) through NEW LIMITS center
- SRC Global Research Collaboration
- National Science Foundation (NSF) [ECCS-1917025, DMR-1921818]
Monolithic 3D heterogeneous integration is the most cost-effective approach for achieving continued scalability in power and performance in integrated circuit technologies. The paper discusses various methods and materials to overcome constraints imposed by placing active devices in upper levels, focusing on better materials and utilizing unique physics to surpass current limitations in 3D integrated device performance.
Monolithic 3D heterogeneous integration is the most cost effective route to realize continued scaling in power and performance in integrated circuit technologies. In this paper, we discuss a variety of methods, materials, and device concepts to help overcome the constraints imposed by putting active devices in the upper levels. Our focus is on realizing better materials at low processing temperature for logic, memory, and dense interconnects taking advantage of unique physics to surmount current limitations in 3D integrated device performance.
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