期刊
2021 32ND IRISH SIGNALS AND SYSTEMS CONFERENCE (ISSC 2021)
卷 -, 期 -, 页码 -出版社
IEEE
DOI: 10.1109/ISSC52156.2021.9467838
关键词
BGR; noise; Low voltage; PSRR; self-bias phase-margin
This paper discusses the voltage limitation in traditional BGR circuits and proposes a new technique for operating at lower voltages. Experimental results show that this technique reduces power consumption and occupies less area while maintaining performance without degradation.
Traditional BGR circuits require a 1.05V supply due to the V-BE of the BJT. Deep submicron CMOS technologies are limiting the supply voltage to less than 940mV. Hence there is a strong motivation to design them at lower supply voltages. The supply voltage limitation in conventional BGR is described qualitatively in this paper. Further, a current mirror-assisted technique has been proposed to enable BGR operational at 0.82V supply. A prototype was developed in 65nm TSMC CMOS technology and post-layout simulation results were performed. A self-bias opamp has been exploited to minimize the systematic offset. Proposed BGR targeted at 450mV works from 0.82-1.05V supply without having any degradation in the performance while keeping the integrated noise of 15.2 mu V and accuracy of 23.4ppm/degrees C. Further, the circuit consumes 21 mu W of power and occupies 73*32 mu m(2)silicon area.
作者
我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。
推荐
暂无数据