期刊
ADVANCED SCIENCE
卷 3, 期 5, 页码 -出版社
WILEY
DOI: 10.1002/advs.201500439
关键词
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资金
- Ministry of Science, ICT and Planning of South Korea under the IT Consilience Creative Program [IITP-2015-R0346-15-1007]
- Center for Advanced Soft Electronics under the Global Frontier Research Program of the Ministry of Science, ICT and Planning of South Korea [2014M3A6A5060952]
- National Research Foundation of Korea [2014M3A6A5060952] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)
The fabrication and measurements of solution-processed vertically stacked complementary organic field-effect transistors (FETs) with a high static noise margin (SNM) are reported. In the device structure, a bottom-gate p-type organic FET (PFET) is vertically integrated on a top-gate n-type organic FET (NFET) with the gate shared in-between. A new strategy has been proposed to maximize the SNM by matching the driving strengths of the PFET and the NFET by independently adjusting the dielectric capacitance of each type of transistor. Using ideally balanced inverters with the transistor-on-transistor structure, the first examples of universal logic gates by inkjet-printed routing are demonstrated. It is believed that this work can be extended to large-scale complementary integrated circuits with a high transistor density, simpler routing path, and high yield.
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